1. Technical Field of the Invention
The present invention relates to a method for configuring a voltage regulator. The invention particularly, but not exclusively, relates to a method for configuring a voltage regulator for the drain terminal of memory cells involved in a programming operation and the following description is made with reference to this field of application by way of illustration only.
2. Description of Related Art
As it is well known in this specific technical field, during the programming step of a Flash memory cell, it is important to set the voltage applied to the cell's terminals (Gate, Source, Drain, and Body). For multilevel Flash memories, where the cell is programmed at different threshold voltage values to memorize a number of bits greater than one, the stability of the voltage of these terminals becomes an even more critical issue.
In particular, in these multilevel Flash memories, the need for accurately controlling the threshold voltage value of each cell results in a slowdown of the programming operation with respect to the programming of single level memory devices.
The most used multilevel programming algorithm in fact provides a succession programming pulses and verify operations carried out on a group of cells to be programmed.
Each programming pulse increases the voltage value of the control or gate terminal of the cells involved in the programming operation, while the voltage value of another terminal, in particular the drain terminal, is kept constant.
Between a given programming pulse and the next following pulse, the memory cells are then subjected to a verify operation and, in case they have reached a desired state, i.e., they have a threshold voltage value within a desired distribution, they are disconnected from the group of cells to be programmed.
It is to be underscored that the drain voltage value is an important factor to realize a correct programming. In fact, a too low value of this drain voltage prevents a correct programming of the memory cell, while a too high value of this drain voltage could damage the cell itself.
The drain voltage value is usually obtained by means of a suitable drain voltage regulator connected to the group of memory cells.
In particular, this drain voltage regulator ensures, during each single programming pulse, that a constant voltage value is applied to the drain terminals of the cells to be programmed, in order to be able, in this way, to control the corresponding threshold variation of the cells caused by the programming pulse.
It is known to use drain voltage regulators with configurations of the source follower type that are able to keep as much stability as possible on the voltage supplied by the regulator itself.
This drain voltage is, in reality, a function also of the current absorbed by each memory cell involved in the programming operation. In particular, the current absorbed by the memory cell during a programming pulse depends on the resistive path existing between the source terminal of a pass-transistor used as a control element of the cell (and connected to the columns of the matrix of cells to be programmed) and the effective drain terminal of the cell to be programmed. In other words, the current absorbed by the cell depends on the group of cells involved in the programming operation, as well as on the multilevel value which is to be programmed.
This limit imposes restrictions to the multilevel programming operation preventing the optimization of the times necessary to conclude this operation.
Moreover, it has been observed how, during a programming pulse of a cell, the current absorbed thereby depends, as well, on the speed of the ramp that is used. In particular, the faster the ramp, the greater the current absorbed and, thus, the lower the control on the variation of the drain voltage of the cell itself.
In other words, reducing the time necessary for the programming operation would require the use of faster ramps which however imply a decrease of the control on the variation of the drain voltage and thus increase the risk of an incorrect programming of the cell.
Moreover, the drain voltage regulators realized according to the prior art are not able to face variations of the current absorbed by the cell, which causes a variation of the drain voltage, with consequent uncertainty about the outcome of the programming operation carried out on this cell.
There is accordingly a need for providing a voltage regulator able to provide a constant drain voltage value which is independent from the pattern of data to be programmed, so as to overcome the limits still affecting the regulators realized according to the prior art.